1. Field of the Invention
This invention relates to a method and a system for compaction-processing mask pattern data for a semiconductor integrated circuit device such as an LSI for the purpose of preparing mask pattern of a semiconductor integrated circuit device of different design standards (dimension standards), and in particular, to a method and a system for obtaining mask pattern data for LSIs of small size design standards from LSI mask pattern data having a hierarchical structure.
2. Description of the Related Art
With the recent progress in the art of manufacturing semiconductors, a substantial reduction in the dimensions of various parts composing a semiconductor integrated circuit device has been aimed at, with the result that the integration degree of such devices is becoming higher and higher. In other words, more and more semiconductor integrated circuit devices of modified design standards, i.e. those with parts having reduced dimensions, are being required to be manufactured. The mask pattern of a semiconductor integrated circuit device whose design standard has been thus modified can be obtained by compaction-processing the mask pattern of the existing semiconductor integrated circuit device.
FIG. 8 shows a conventional mask pattern layout system utilized for preparing the mask pattern of an LSI through compaction-processing. The system includes a central processing unit (hereinafter referred to as CPU) 1. Connected to this CPU 1 are a graphic display device 2 for displaying LSI mask patterns, a keyboard device 3 for inputting various instructions, and a magnetic disc device 4 for storing LSI mask pattern data.
In designing an LSI mask pattern, the entire pattern is normally divided into a number of definite units, the design work being individually conducted for each of such units. Accordingly, LSI mask pattern data constitute a hierarchical structure which is composed, as shown in FIG. 9 by way of example, of lower-level cells 5 through 7 and a higher-level cell 9 including a wiring zone 8 between the lower-level cells 5 through 7. The magnetic disc device 4 stores LSI mask pattern data having such a hierarchical structure.
Here, the operation of this conventional mask pattern layout sytem is described with reference to a flowchart of FIG. 10. First, previously designed LSI mask pattern data stored in the magnetic disc device 4 is read out in Step 10 by means of the CPU 1, a previously designed LSI mask pattern being displayed on the graphic display device 2 based upon the data thus read out. In the next Step 11, instructions to expand the hierarchical structure of the LSI mask pattern data are input through the keyboard device 3, the previously designed LSI mask pattern data being expanded in Step 12 into planar pattern data having no hierarchy.
Subsequently, in Step 13, compaction instructions for adapting the dimensions of the LSI mask pattern to the new design standards are input through the keyboard device 3, the planar previously designed LSI mask pattern data with no hierarchy being compaction-processed in Step 14 by the CPU 1.
New LSI mask pattern data which have been thus compaction-processed are stored in the magnetic disc device 4 by means of the CPU 1 while the mask pattern thereof is displayed on the graphic display device 2.
In the conventional mask pattern layout system described above, however, the hierarchical structure of previously designed LSI mask pattern data are expanded into planar pattern data before the mask pattern is compaction-processed, resulting in an enormous amount of data to be compaction-processed at one time, which requires an exceedingly time-comsuming operation.